conference/DATE'22: An Essay was Accepeted
An Energy-Efficient Bit-Split-and-Combination Systolic Accelerator for NAS-Based Multi-Precision Convolution Neural Networks
conference/DATE'22: An Essay was Accepeted
An Energy-Efficient Bit-Split-and-Combination Systolic Accelerator for NAS-Based Multi-Precision Convolution Neural Networks
conference/ASP-DAC'22: An Essay was Accepeted
A Precision-Scalable Energy-Efficient Bit-Split-and-Combination Vector Systolic Accelerator for NAS-Optimized DNNs on Edge
conference/ICTA'21: An Essay was Accepeted
A Fast Method for Steady-State Memristor Crossbar Array Circuit Simulation
conference/ICTA’21: An Essay was Accepeted
A Fast Method for Steady-State Memristor Crossbar Array Circuit Simulation
workshop/IEEE-CASS-SSJW'21: Volunteer
IEEE Circuits and Systems Society Shanghai and Shenzhen Joint Workshop